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  rev.1.00 sep 14, 2005 page 1 of 5 m62015l/fp, m62016l/fp low power 2 output system reset ic rej03d0783-0100 rev.1.00 sep 14, 2005 description the m62015 and m62016 are semiconductor integrated circuits whose optimum use is for the detection of the rise and fall in the power supply to a microcomputer system in order to reset or release the microcomputer system. the m62015 and m62016 carry out voltage detection in two steps and have two output pins. as bi-cmos process and low power dissipating circuits are employed, they output optimum signals through each output pin to a system that requires ram backup. these ics also support the backup mode of renesas microcomputer the m16c. features ? bi-cmos process realizes a configuratio n of low current dissipating circuits. circuit current i cc = 3 a (typ, normal mode, v cc = 3.0 v) i cc = 1 a (typ, backup mode, v cc = 2.5 v) ? two-step detection of supply voltage detection voltage in normal mode: v s = 2.7 v (typ) detection voltage in backup mode: v batt = 2.0 v (typ) ? two outputs reset output ( reset ): output of compulsive reset signal interruption output ( int ): output of interruption signal ? two types of output forms cmos output: m62015l/fp open drain output: m62016l/fp application ? prevention of errors in microcomputer system in electronic equipment that requires ram backup, such as office, industrial, and home-use equipment. pin arrangement M62015FP m62016fp m62015l m62016l 8 5 6 7 int nc nc: no connection nc gnd reset nc v cc cd 1 4 3 2 (top view) package: prsp0008da-a (8p2s-a) package: 5p5t (top view) v cc reset gnd 5 1 2 3 4 int cd
m62015l/fp, m62016l/fp rev.1.00 sep 14, 2005 page 2 of 5 block diagram v cc 3 8 int r1 com r2 + ? interruption signal generation block 1 rese t r3 com r4 + ? 2 cd 7 gnd reset signal generation block
m62015l/fp, m62016l/fp rev.1.00 sep 14, 2005 page 3 of 5 absolute maximum ratings (ta = 25c, unless otherwise noted) item symbol ratings unit conditions supply voltage v cc 8 v output sink current isink 4 ma power dissipation pd 440 mw thermal derating k 4.4 mw/c ta 25c operating temperature topr ?20 to +75 c storage temperature tstg ?40 to +125 c electrical characteristics (ta = 25c, unless otherwise noted) item symbol min typ max unit test conditions supply voltage v s 2.55 2.70 2.85 v interruption level during v cc drop battery voltage v batt 1.85 2.00 2.15 v reset level at backup hysteresis voltage ? v s ? 60 ? mv ? v s = v sh ? v sl ? 3.0 12 v cc = 3.0v: in normal mode circuit current i cc ? 1.0 4.0 a v cc = 2.5v: in backup mode sink ability vsat ? 0.4 0.6 v v cc = 2.5v, isink = 2ma delay time td ? 50 ? ms external capacitance cd = 0.33 f reset output response time t reset ? 50 ? s when v cc falling interruption output reset time t int ? 40 ? s when v cc falling application example + ? v cc int int reset + ? reset interruption reset signal *note m62015/m62016 compulsive reset signal cd + smoothing capacitor 100 f v dd power supply pin microcomputer system microcomputer system reset ic delay capacitor 0.33 f int interruption input reset reset input clock input/output backup power supply v batt (+3v) power supply v cc (+3v) note: a pull-up resistor is required only in the case of open-drain output. figure 1 application example
m62015l/fp, m62016l/fp rev.1.00 sep 14, 2005 page 4 of 5 operating description td td gnd gnd gnd 3v v cc int reset v sh v sh (1) (1): (2): (3): (4): (5): (6): (7): (8): (9): (10): if v cc rises to v sh (2.76v), the int output is set to high level. reset goes high t d (s) after v sh . * td = 1.52 10 5 c (s) if v cc drops to v sl (2.70v), int goes low. * reset output continues to be held high. if v cc returns to v sh , the int output is set to high level. same as (3). if v cc becomes lower than v batt (2.00v), the reset output is set to low thereby resetting the microcomputer and initializing system. same as (1). same as (2). same as (3) and (5). same as (6). (2) (10) (7) (6) (5) (4) (3) (8) (9) v sh v batt v batt v batt v sh v sl v sl v sl v sl ? v s uncertain area uncertain area figure 2 operating waveform
m62015l/fp, m62016l/fp rev.1.00 sep 14, 2005 page 5 of 5 package dimensions sip5-p-240-2.54 weight(g) ? jedec code eiaj package code lead material cu alloy 0.22 5p5t plastic 5pin 240mil sip ? ? ? ? ? 4.0 ? 11.9 11.5 symbol min nom max a a 2 b 1 b b 2 c d e e 1 l dimension in millimeters a 1 3.0 2.54 0.8 0.7 0.6 2.17 1.97 1.77 11.7 0.34 0.27 0.22 1.15 0.85 0.75 1.5 1.2 1.1 0.6 0.5 0.4 1.4 6.1 e ? ? ? ? d e a 2 a 1 a l e 1 c b 2 b 1 b e seating plane 1 5 2. 1. dimensions "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. b p a 1 h e y0.1 e 1.27 c 0 10 l0.20.40.6 0.05 a1.9 5.9 6.2 6.5 a 2 1.5 e4.24.44.6 d4.85.05.2 reference symbol dimension in millimeters min nom max 0.35 0.4 0.5 0.13 0.15 0.2 p-sop8-4.4x5-1.27 0.07g mass[typ.] 8p2s-a prsp0008da-a renesas code jeita package code previous code 1.12 1.42 detail f l a 1 a 2 f *1 *2 *3 85 4 1 index mark y b p e a c e h e d
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi als. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com refer to " http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology hong kong ltd. 7th floor, north tower, world finance centre, harbour city, 1 canton road, tsimshatsui, kowloon, hong kong tel: <852> 2265-6688, fax: <852> 2730-6071 renesas technology taiwan co., ltd. 10th floor, no.99, fushing north road, taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. unit2607 ruijing building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1 harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas technology korea co., ltd. kukje center bldg. 18th fl., 191, 2-ka, hangang-ro, yongsan-ku, seoul 140-702, korea tel: <82> 2-796-3115, fax: <82> 2-796-2145 renesas technology malaysia sdn. bhd. unit 906, block b, menara amcorp, amcorp trade centre, no.18, jalan persiaran barat, 46050 petaling jaya, selangor darul ehsan, malaysia tel: <603> 7955-9390, fax: <603> 7955-9510 renesas sales offices ? 200 5. re nesas technology corp ., all rights reser v ed. printed in ja pan. colophon .3.0


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